VHDL hardware description language , structure descriptions, data flow (dataflow) and behavioral design of diode data of a RISC embedded processor description in VHDL register transfer level (RTL), design of the control unit of an embedded RISC processor as algorithmic state machine (Moore and Mealy) with diagrams statements and VHDL, design for high testability , design for low power consumption , implementation of algorithms in hardware , comparing implementations in hardware and software . Workshop : VHDL simulation and synthesis of combinational and sequential circuits , algorithmic state machines , memories and RISC processors.